Microwind, France, develops and markets electronic design software for designers of mixed-signal and analog IC, ASIC.

MICROWIND3 is user friendly layout and simulation tool for sub-micron CMOS design. The MICROWIND3 allows the designer to simulate and design an integrated circuit at physical description level. The package contains a library of common logic and analog ICs to design and simulate. MICROWIND3 includes all the commands for a mask editor as well as verification tools never gathered before in a single module. MICROWIND3 is truly a complete and cost-effective design solution for your CMOS design. nanoLambda VirtuosoFab MEMsim PROthumb PROtutor

DSCH Schematic editor and simulator

User-friendly environment for rapid design of logic circuits. Handles both conventional pattern-based logic simulation and intuitive on-screen mouse-driven simulation. Supports hierarchical logic design. Built-in extractor which generates a SPICE netlist from the schematic diagram (Compatible with PSPICEâ„¢ and WinSpiceâ„¢). Current and power consumption analysis. Generates a VERILOG description of the schematic for layout editor. Immediate access to symbol properties (Delay, fanout). Models and assembly support for 8051 and PIC 18f84. Sub-micron, deep-submicron, nanoscale technology support. Supported by huge symbol library.

NanoLambda Precision CMOS Layout tool upto 35 nanometers.

Sub-micron, deep-submicron, nanoscale technology support. Unsurpassed illustration capabilities. Design-error-free cell library (Contacts, vias, MOS devices, etc..) Advanced macro generator: capa, self, matrix, ROM, pads, path, etc..) Incredible translator from logic expression into compact design-error free layout. Powerful automatic compiler from VERILOG circuit into layout. On-line design rule checker: width, spacing, overlap, extension rule verification. Built-in extractor which generates a SPICE netlist from layout. Extraction of all MOS width and length. Parasitic capacitance, crosstalk and resistance extracted for all electrical nodes. Import/Export CIF layout from 3rd party layout tools. Up to 100,000 elementary boxes. Lock & unlock layers to protect some part of the design from any changes. Enhanced editing commands and layout control. Support upto 8 metal layers for DSM technologies. NEW Global delay evaluation of circuit. NEW Global cross talk analyzer.NEW Inversion of diffusions boxes. NEW Easy label listing.NEW Enhanced mathematical signal description. NEW Zoom in navigator. NEW Support till 22 nanometer technology. NEW Enhanced memory utilization for faster simulation. NEW Silicon atom viewer. NEW

PROthumb Mixed signal simulation and analysis

Built-in SPICE-like analog simulator features fast time-domain, voltage and current estimation, with very intuitive post processing: frequency estimation, delay estimation. (No external SPICE/ analog simulator.) Supports LEVEL1, LEVEL3 and BSIM4 models for all technologies from 1.2µm downto 35nm MOS characteristic viewer, with access to main model parameter. Real-case measurement data-base in 0.7,0.35, 0.25 and 0.18µm for comparison with models. The ability to label nodes allows intuitive control of the simulation (Supply, clock, pulse, PWL, sinus, maths) Time-domain voltage and current waveforms available at the press of one single icon DC/AC characteristics, signal frequency vs. time, eye diagrams Min/Typ/Max analog simulation Convenient Monte-carlo simulation Powerful fast-Fourier Transform to support radio-frequency circuit simulation On screen Power estimation Sophisticated parametric simulation to investigate the effect of several key parameters on the circuit performances: R,L,C, temperature, supply voltage, etc. Huge device simulation model library Inbuild interconnect analyzer to compute field between ground planes and conductor Enhanced memory utilization for faster simulation. NEW Onscreen storage of waveforms for result hold-on. NEW Now with forward & backward buttons to move in simulation results. NEW

VirtuosoFab Touch the deep-sub micron technology

3D fabrication process simulator with cross sectional viewer   Step-by-step 3-D visualization of fabrication for any portion of layout See how the contacts and metallizations are created See the self-aligned diffusion after the polysilicon gate is fabricated Check planes of VDD, VSS, and others signals Check the oxide structure, the low dielectric (Low K) and high K (SiO2) sandwich, and passivation User can check the gate oxide and the MOS lateral drain diffusion structure Now 3D layout with GEL technology, where you can rotate, move in-out through the layouts. NEW

PROtutor Specially enabled university edition with enhanced training features

A valuable tutor to understand the MOS characteristics, with a user interface that beginners will like Change the model parameters and see their effects on Id/Vd, Id/Vg Id(log)/Vg, threshold vs. Length You can also fit the simulations with measurements we made in test-chips fabricated in 0.35, 0.25 and 0.18 mm Full length tutorial on MOS models is provided in manual, with details on all parameters Microwind3 supports models 1,3 and BSIM4 200-pages documentation including several aspects of logic design More than 150 basic circuits ready to simulate

MEMsim Non volatile floating gate memory simulator

Simulation of non-volatile memories such as EPROM, EEPROM and FLASH using double-gate MOS. Erasure of floating gates and removal all electrons. Programming can be performed by a very high voltage supply on the gate. The following technology library rules files are available along with detailed parameters for the Design Rule Checks (DRC Errors).

Technology library available Minimum feature size

Cmos12.rul 1.2um Cmos08.rul 0.7um Cmos06.rul 0.5um Cmos035.rul 0.4um Cmos025.rul 0.25um Cmos018.rul 0.2um Cmos012.rul 0.12um Cmos90n.rul 0.1um Cmos70n.rul 0.07um Cmos50n.rul 0.05um

Note: TekBrains is Authorised dealer for Mentor DSP for Bihar, Jharkhand and WestBengal  state of India for  Sales and Promotion of Microwind.

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